Electronics Forum / CAD / July 2005

I am building a CNC type PCB milling machine. Does anyone know of any
software that will take as input either an HPGL file or a Gerber file and
convert it so that it plots the outlines of the tracks (ie. suitable for PCB
milling ? Have any of you folks used TurboCNC in this way ...

I was attempting to find some of the newer 'top gun' PCB design results that
used to be published in PCB Design, and I'm finding that their web site
(www.pcdmag.com) is dead nor does Google return anything recent realting to
them.  They they die?  Turn into another magazine?  Does ...

  I see no way to add an arbitrary device and use X to call its use.
  Not even if it happens to be a zener defined with a .SUBCKT ..
  Good thing i kept my DOS version of TopSpice!

Pardon me because this is off-topic, but it is important. I have been asked
to move with my company to San Diego California, and I need some reference
point to compare what they are offering. Can anyone tell me:
- What ballpark base salary (before benefits and 401(k)) should a

How to measure the center frequency of VCO in spice3?
Thanks.

Is there a way to back annotate a text from a schematic or netlist
output or other means?
I write my docs while doing the schematic and can only use the
designators as they pop up when parts are placed. However, when doing

  When designing a system (computer) with a 32-bit data bus that is
connected to 4 SRAM chips in parallel, each 8-bit wide, the usual (but
not optimal) approach would be to connect pin D0 from SRAM chip 0 to
processor's D0, D1 from SRAM chip 0 to processor's D1 and so on.

I have a problem with my cam350.
When I import a file it give me a message: "CamWare limit exceeded" and
it close everything.
Someone can help me?

For quite some time I'm working on a new IC layout editor. I've started
this as a home project and it looks now that some help and support can
be quite handy.
Here are some details about the project:

Looking for opinions on the quality/capability/user-friendliness of
the LVS tool from IC Editors.
                                       ...Jim Thompson

This also addresses  a message I posted a couple of days ago. I am
trying to design an analog switch for a DRAM application.
The problem is "a drastic difference" in behavior when I used cadence
tool to pspice.  My schematic is a very simple test circuit where the

  I would like to have a way of altering a FET model so that it follows
the Vgs VS log(Is) instead of dropping rapidly near 1mA like:
                   /
                  /

Anyone know of a reasonably priced netlist comparator?
What I'm looking for would be able to read in two netlists and
generate a report of mismatches.
                                       ...Jim Thompson

I am running a pspice simulation that is pretty lengthy. It was running
fine yesterday and today when I checked it the system had somehow
rebooted (maybe someone did it or somehow)..now when I invoke pspice to
run my simulation, it gives me a message saying that - unable to open

What is the current convention with respect to pin numbers on SOT23?
I have seen:
Zetex       1
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