| Thread | Last Post | Replies |
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| Protel : ERC floating input error everywhere ! | 31 Jan 2004 01:37 GMT | 4 |
Could somebody please give me a hint on what to do about the ERC analysis in Protel99SE giving me "floating input" errors in ALL my input pins connected to a BUS. For example, a memomory address bus connected to the address pins in the part, they all give me this
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| LTSpice Math Ops? | 31 Jan 2004 01:17 GMT | 7 |
Hi,, I admit I don't use LTS much but wanted to try the wav file input feature not available in PSpice student version and try some signal processing.. But I couldn't find the comparable math blocks like
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| High Current Trace Widths - PCB Design | 30 Jan 2004 22:02 GMT | 12 |
I have designed a protection circuit for some outdoor equipment that could be exposed to lightning strikes. The discrete components are PCB mountable but I can't find any guidelines for sizing the traces for high current from a strike. Any references for determining trace
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| OrCAD Capture 9.0 - fix a probably corrupted part? | 30 Jan 2004 20:40 GMT | 12 |
I have a part in a library, under OrCAD capture 9.0, that we got from a third party. However, I suspect it's corrupted. It's a heterogeneous part, but irritatingly, there's one too many parts in the package. One of the "parts" is blank. So I want to delete it. However, when I ...
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| URGENT: Need A Schematic Drawing tool | 28 Jan 2004 03:52 GMT | 6 |
I have an urgent need for a transistor level (BJT, MOSFET, passive + active element) schematic drawing tool ?? Anything free out there ?? BTW, an exisiting Visio template will also do the job. Thanks for your input in advance,
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| Protel DXP Autorouter is it really 100% unuseable? | 26 Jan 2004 21:46 GMT | 13 |
I am getting really desperate - it seems that Protel DXP autorouter starts with random failures from some complexity of the board. It is constantly leaving some small artifacts in the routed design (even the autorouter claims full route no contentions) when doing
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| PSpice - Gates - worst-case output level question | 26 Jan 2004 03:17 GMT | 2 |
I'd like to know how to get a gate sim to output other values like Vol max and Voh min and even sweep the levels. How do you do that?
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| VHDL / auto-layout / decimation filter | 23 Jan 2004 18:23 GMT | 1 |
Hi, All: I need to design a decimation filter in VHDL / Verilog, and convert VHDL code to layout. I have already design a sigma-delta modulator for 4 KHz input signal, 1.040
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| Exp so slow [LTSpice] | 22 Jan 2004 22:58 GMT | 4 |
This simple thing: * Y:\spice\LT-SWcad\impulse.asc V1 N001 0 EXP(0 10 1n 1n 10n 1m) .tran 10m
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| Negative Voltage Regulator - Please HELP! | 22 Jan 2004 08:41 GMT | 1 |
I am in desperate need of a SPICE model/subcircuit for a negative voltage regulator. I made a previous post for an LM337, but anyone would do. (LM337 still prefered though). ANY help would be much appreciated. Thanks,
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| picc18 | 19 Jan 2004 02:47 GMT | 1 |
Anyone that knows from where can I download Hi-tech picc18 v 8.30 full version?
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| OT! OT! Hard Drive Cloning | 17 Jan 2004 17:55 GMT | 88 |
I haven't done this in years, so could I have everyone's opinion for best hard drive cloning software? I have one that's starting to exhibit clunking noises and I'd like to copy it *now* so that I don't have to do massive software re-installs
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| picc18 | 16 Jan 2004 17:27 GMT | 3 |
Anyone that has the hi-tech pic8 v8.30 soft?
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| SWCAD III - plotting waveform | 16 Jan 2004 16:38 GMT | 5 |
My investement in CircuitMaker is substantial, over years, and it has many features I like (including its extensive library). So I'd probably never willingly abandon it. But it's clear that LTspice/SwitcherCAD III has many strengths (including its support
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| Possible outsourcing work for Viewdraw/Allegro house | 16 Jan 2004 09:59 GMT | 1 |
Due to a heavy, but probably temporary, workload, we are currently considering outsourcing several of our upcoming PCB layouts. We use Innoveda Viewdraw as a schematic entry tool, and Allegro as our PCB layout tool. The work is for high speed,impedance controlled PCBs,
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