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Electronics Forum / Design / July 2008Speaking of good H-bridge design practices...
...on this schematic: http://www.modularcircuits.com/download/h-bridge_sch_pcb.pdf ... D1-D4 (MMBZ5240BLT1) are 10V Zener diodes (yes, even though he drew them as Schottkys). Presumably D1 and D3 protect the high-side FETs Q3 and Q5, clamping Vgs to the range of about -1V to 10V -- well within the +/-20V Vgs rating of the part. (The idea being that, with inductive loads, potentially the source terminals could see large negative voltages, causing Vgs to become large). However, why do the low-side FETs Q4 and Q6 require D2 and D4? Since their sources are grounded and their gates are driven by U4, how could Vgs ever become something that would need clamping? Or am I missing something more fundamental here? Thanks, ---Joel >...on this schematic: >http://www.modularcircuits.com/download/h-bridge_sch_pcb.pdf ... D1-D4 [quoted text clipped - 8 lines] > >Or am I missing something more fundamental here? A properly selected zener (400mW or less with a good slug construction), in combination with appropriate series limiters, will act to prevent down-stream driver circuit damage in the event of fet failure or other single fault abnormals. Without at least one series resistor to fuse 'open', the technique won't work reliably. This is a repairability issue, which is not always a serious consideration nowadays. RL > A properly selected zener (400mW or less with a good slug > construction), in combination with appropriate series limiters, will > act to prevent down-stream driver circuit damage in the event of fet > failure or other single fault abnormals. Without at least one series > resistor to fuse 'open', the technique won't work reliably. Could you possibly provide an example of a fault that D2 or D4 protects from? Or are you says that since Q4 and Q6's gates don't have series resistors back to the driver IC (IR4427), this circuit doesn't provide such protection? > This is a repairability issue, which is not always a serious > consideration nowadays. It definitely wasn't taught where I went to school. I suppose it boils down to just thinking about what's going to blow up as you go through your various "power" components one by one, and then coming up with some scheme to prevent, e.g., cascade failure? >> A properly selected zener (400mW or less with a good slug >> construction), in combination with appropriate series limiters, will [quoted text clipped - 5 lines] >Or are you says that since Q4 and Q6's gates don't have series resistors back >to the driver IC (IR4427), this circuit doesn't provide such protection? Right. In this circuit the zeners appear to have been inserted out of habit, rather than for an intended function. ESD protection is probably misplaced here, in amy event. Gate drive voltage amplitude control is most economically achieved by addressing integrity of the driver's supply rail. Even here, different sections should be impedance-isolated and locally clamped to avoid telegraphing faults to the more sensitive areas. >> This is a reparability issue, which is not always a serious >> consideration nowadays. [quoted text clipped - 3 lines] >"power" components one by one, and then coming up with some scheme to prevent, >e.g., cascade failure? Getting power train energy back into a control circuit supply rail is something you don't want to be faced with in the field, without capability of a complete FRU swap-out. Techies may complain about gate resistors getting fried, but I don't think they appreciate the alternatives that are avoided by it's 'fusing'. RL > Techies may complain about gate resistors getting fried, but I don't > think they appreciate the alternatives that are avoided by it's > 'fusing'. Oh indeed. As the years went by I ended up using more and more fusible Rs. I first noticed them in Japanese audio amps btw. Graham > >...on this schematic: > >http://www.modularcircuits.com/download/h-bridge_sch_pcb.pdf ... D1-D4 [quoted text clipped - 17 lines] > This is a repairability issue, which is not always a serious > consideration nowadays. I'd have thought you'd want the 'fuse' R between the FET gate and the zener to get the best effect. Graham |
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