Electronics Forum / CAD / January 2008

Well, just call them up and try to cajole them into releasing the good
stuff :-)

Not that they always do it. For a TPS regulator they said no and then I
consequently designed it out. Lost revenue for them. Other times I was
luckier.

Have you emailed the parts maker or looked on their site?

Bob

* DEVICE=OPA277,OPAMP,NPN,INT

*

* OPA277 operational amplifier "macromodel" subcircuit

* created using Parts release 8.0 on 11/18/97 at 11:06

* Parts is a MicroSim product.

*

* connections:  non-inverting input

*               | inverting input

*               | | positive power supply

*               | | |  negative power supply

*               | | |  |  output

*               | | |  |  |

.subckt OPA277  + - V+ V- OUT

*

 c1   11 12 4.8119E-12

 c2    6  7 110.00E-12

 dc    OUT 53 dy

 de   54  OUT dy

 dlp  90 91 dx

 dln  92 90 dx

 dp    V- V+ dx

 dq1  20 21 dx

 dq2  22 20 dx

 egnd 99  0 poly(2) (V+,0) (V-,0) 0 .5 .5

 fb    7 99 poly(5) vb vc ve vlp vln 0 1.5000E9 -1E3 1E3 1E9 -1E9

 fq1   V+  0 vq1 1

 fq2   0  V- vq2 1

 fq3   0 20 vlim 1

 ga    6  0 11 12 133.33E-6

 gcm   0  6 10 99 13.333E-12

 iee  10  V- dc 100.60E-6

 hlim 90  0 vlim 1K

 q1   11  42 13 qx1

 q2   12  41 14 qx2

 r2    6  9 100.00E3

 rc1   V+ 11 7.5000E3

 rc2   V+ 12 7.5000E3

 re1  13 10 750

 re2  14 10 750

 ree  10 99 1.9881E6

 ro1   8  OUT 50

 ro2   7 99 25

 rp    V+ V- 42.511E3

 vb    9  0 dc 0

 vc    V+ 53 dc 1.8124

 ve   54  V- dc 1.8124

 vlim  7  8 dc 0

 vlp  91  0 dc 35

 vln   0 92 dc 35

 vq1  21  0 dc 0

 vq2   0 22 dc 0

*Input Protection Circuitry

 r1in  + 41 1K

 r2in  - 42 1K

 din1 41 42 dx

 din2 42 41 dx

.model dx D(Is=800.00E-18)

.model dy D(Is=800.00E-18 Rs=1m Cjo=10p)

.model qx1 NPN(Is=800.00E-18 Bf=100E3 Kf=250f)

.model qx2 NPN(Is=800.3094E-18 Bf=200.00E3 Kf=250f)

.ends OPA277

*

*version 8.0 207719823
u 113
U? 17
R? 4
V? 5
I? 2
? 3
C? 2
PM? 2
@libraries
@analysis
.AC 1 3 0
+0 101
+1 10
+2 10MEG
+3 V(RL:2)
+4 Vin
.TRAN 0 0 0 0
+0 2ns
+1 200us
+3 200n
.STEP 1 0 4
+ 0 CLVAL
+ 4 0
+ 5 1500p
+ 6 500p
@targets
t 1;95: a 0 s 0:13 0 0 0 hln 100 PKGREF=U1
t 1;98: a 0 s 0:13 0 0 0 hln 100 PKGREF=C1
t 1;98: a 0 s 0:13 0 0 0 hln 100 PKGTYPE=CK05
t 1;97: a 0 s 0:13 0 0 0 hln 100 PKGREF=U1
t 1;108: a 0 s 0:13 0 0 0 hln 100 PKGREF=PM1
@attributes
@translators
a 0 u 13 0 0 0 hln 100 TANGO=PCB
a 0 u 13 0 0 0 hln 100 SCICARDS=PCB
a 0 u 13 0 0 0 hln 100 PROTEL=PCB
a 0 u 13 0 0 0 hln 100 PCBOARDS=PCB
a 0 u 13 0 0 0 hln 100 PCAD=PCB
a 0 u 13 0 0 0 hln 100 PADS=PCB
a 0 u 13 0 0 0 hln 100 ORCAD=PCB
a 0 u 13 0 0 0 hln 100 EDIF=PCB
a 0 u 13 0 0 0 hln 100 CADSTAR=PCB
a 0 u 13 0 0 0 hln 100 PSPICE=PSPICE
a 0 u 13 0 0 0 hln 100 XILINX=XILINX
a 0 u 13 0 0 0 hln 100 POLARIS=PCB
@setup
unconnectedPins 0
connectViaLabel 0
connectViaLocalLabels 0
NoStim4ExtIFPortsWarnings 1
AutoGenStim4ExtIFPorts 1
@index
pageloc 1 0 2684
@status
n 0 97:11:08:15:22:39;881619759 e
s 0 97:11:08:15:24:04;881619844 e
p 2453 97:11:08:14:48:09;881617689 e
*page 1 0 1520 970 iB
@ports
port 9 AGND 260 240 h
port 10 AGND 330 230 h
port 13 AGND 260 100 u
port 105 AGND 390 230 h
port 8 AGND 180 250 h
@parts
part 5 VDC 260 140 u
a 1 u 13 0 -11 18 hcn 100 DC=15V
a 0 sp 0 0 22 37 hln 100 PART=VDC
a 0 x 0 0 0 0 hln 100 PKGREF=V+
a 1 xp 9 0 -12 37 hcn 100 REFDES=V+
part 6 VDC 260 240 u
a 1 u 13 0 -11 18 hcn 100 DC=15V
a 0 sp 0 0 22 37 hln 100 PART=VDC
a 0 x 0 0 0 0 hln 100 PKGREF=V-
a 1 xp 9 0 -12 33 hcn 100 REFDES=V-
part 98 C 390 220 v
a 0 u 13 0 5 63 hln 100 VALUE={CLVAL}
a 0 sp 0 0 0 10 hlb 100 PART=C
a 0 s 0:13 0 0 0 hln 100 GATE=
a 0 ap 9 0 21 38 hln 100 REFDES=C1
a 0 a 0:13 0 0 0 hln 100 PKGREF=C1
a 0 s 0:13 0 0 0 hln 100 PKGTYPE=CK05
part 97 OPA277 220 150 h
a 0 sp 11 0 16 34 hln 100 PART=OPA277
a 0 s 0:13 0 0 0 hln 100 PKGTYPE=
a 0 ap 9 0 2 -8 hln 100 REFDES=U1
a 0 a 0:13 0 0 0 hln 100 PKGREF=U16
part 108 PARAM 410 130 h
a 1 ap 0 0 10 -2 hcn 100 REFDES=PM1
a 0 u 13 0 0 20 hln 100 NAME1=CLVAL
a 0 u 13 0 50 22 hlb 100 VALUE1=10pF
a 0 a 0:13 0 0 0 hln 100 PKGREF=PM1
part 4 R 330 230 v
a 0 u 13 0 15 35 hln 100 VALUE=2k
a 0 sp 0 0 0 10 hlb 100 PART=R
a 0 x 0 0 0 0 hln 100 PKGREF=RL
a 0 x 0 0 0 0 hln 100 PKGTYPE=RC05
a 0 s 0 0 0 0 hln 100 GATE=
a 0 xp 9 0 31 38 hln 100 REFDES=RL
part 112 VSIN 180 210 h
a 0 x 0:13 0 0 0 hln 100 PKGREF=Vin
a 1 xp 9 0 -12 2 hcn 100 REFDES=Vin
a 1 u 0 0 0 0 hcn 100 DC=0
a 1 u 0 0 0 0 hcn 100 AC=0.5
a 1 u 0 0 0 0 hcn 100 VOFF=0
a 1 u 0 0 0 0 hcn 100 FREQ=5k
a 1 u 0 0 0 0 hcn 100 VAMPL=1
part 91 titleblk 1520 970 h
a 1 s 13 0 350 10 hcn 100 PAGESIZE=B
a 1 s 13 0 180 60 hcn 100 PAGETITLE=
a 1 s 13 0 340 95 hrn 100 PAGECOUNT=1
a 1 s 13 0 300 95 hrn 100 PAGENO=1
part 71 nodeMarker 330 170 h
a 0 s 0 0 0 0 hln 100 PROBEVAR=
a 0 a 0 0 4 22 hlb 100 LABEL=1
@conn
w 104
s 390 220 390 230 103
w 79
s 300 170 330 170 25
s 330 60 330 170 61
s 330 170 330 190 86
s 330 170 390 170 99
s 390 170 390 190 101
s 220 150 180 150 52
s 180 60 180 150 58
s 180 60 330 60 109
w 55
s 180 190 220 190 82
s 180 210 180 190 80
@junction
j 260 240
+ s 9
+ p 6 +
j 260 100
+ s 13
+ p 5 -
j 330 230
+ p 4 1
+ s 10
j 330 190
+ p 4 2
+ w 79
j 330 170
+ w 79
+ w 79
j 330 170
+ p 71 pin1
+ w 79
j 260 140
+ p 97 V+
+ p 5 +
j 260 200
+ p 97 V-
+ p 6 -
j 220 190
+ p 97 +
+ w 55
j 300 170
+ p 97 OUT
+ w 79
j 390 190
+ p 98 2
+ w 79
j 390 220
+ p 98 1
+ w 104
j 390 230
+ s 105
+ w 104
j 220 150
+ p 97 -
+ w 79
j 180 250
+ p 112 -
+ s 8
j 180 210
+ p 112 +
+ w 55
@attributes
a 0 s 0 0 0 0 hln 100 PAGETITLE=
a 0 s 0 0 0 0 hln 100 PAGENO=1
a 0 s 0 0 0 0 hln 100 PAGESIZE=B
a 0 s 0 0 0 0 hln 100 PAGECOUNT=1
@graphics
t 0 t 5 130 235 168 253 0 6
1V p-p
t 111 t 5 220 301 380 280 0 33
Capacitive Stability Test Circuit
*version 8.0 692063498
@index
symloc OPA277 0 953
*symbol OPA277
d Precision Op Amp
@type p 8.0
@attributes
a 0 sp 9 0 2 -8 hln 100 REFDES=U?
a 0 sp 11 0 16 34 hln 100 PART=OPA277
a 0 sp 0 0 0 0 hln 100 MODEL=OPA277
a 0 sp 0 0 0 0 hln 100 TEMPLATE=X^@REFDES %+ %- %V+ %V- %OUT @MODEL
@pins
p 2 20 54 hrn 100 + n 0 50 h
a 0 s 1 0 7 46 hrn 100 PIN=3
a 0 s 0 0 0 50 hln 100 ERC=i
a 0 s 0 0 0 50 hln 100 FLOAT=e
p 2 12 12 hln 100 - n 0 10 h
a 0 s 1 0 7 20 hrn 100 PIN=2
a 0 s 0 0 0 10 hln 100 ERC=i
a 0 s 0 0 0 10 hln 100 FLOAT=e
p 2 50 0 hct 100 V+ n 40 0 d
a 0 s 1 0 38 7 hrn 100 PIN=7
a 0 s 0 0 40 0 hln 100 ERC=p
a 0 s 0 0 40 0 hln 100 FLOAT=e
p 2 44 58 hln 100 V- n 40 60 v
a 0 s 1 0 32 61 hlb 100 PIN=4
a 0 s 0 0 40 60 hln 100 ERC=p
a 0 s 0 0 40 60 hln 100 FLOAT=e
p 0 56 36 hrn 100 OUT n 80 30 u
a 0 s 1 0 71 28 hln 100 PIN=6
a 0 s 0 0 80 30 hln 100 ERC=o
a 0 s 0 0 80 30 hln 100 FLOAT=r
@graphics 80 60 0 10 10
v 0 10 60
70 30
;
v 0 70 30
10 0
;
v 0 40 10
40 15
;
v 0 40 50
40 45
;
v 0 10 0
10 60
;

***************************************************
Explanation of files that may be included in this zip package:

.mod       P-SPICE MACROMODEL FILE
.sch       SCHEMATIC EXAMPLE
.slb       SYMBOL FILE FOR P-SPICE DESIGN CENTER(R)MICROSIM CORP