 |
 | Home | Contact Us | FAQ | Search & Site Map | Link to Us |
 | Sign In | Join | Other 45 Sites in Network |
| HomeDiscussion GroupsElectronicsBasicsRepairDesignCADComponentsEquipmentElectrical Engineering ElectronicsKB.com Contact UsLink To UsSearch & Site Map |
Electronics Forum / CAD / March 2006Orcad bus names using leading 0's
I am accustomed to using two digits in my bus numbering so that signal names sort correctly. That means I would name a bus BUS[15:00] instead of BUS[15:0] so that the lower signals would be BUS00, BUS01... I am getting errors in Orcad about wires with only one connection. Is this the reason? I don't see anything in the help that says I can or can't do this. OrCad doesn't tolerate leading zeros in a bus index. Make a quicky 2-sheet test; you'll see. >OrCad doesn't tolerate leading zeros in a bus index. > >Make a quicky 2-sheet test; you'll see. ...or RTFM Best regards, Spehro Pefhany  Signature"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com > >OrCad doesn't tolerate leading zeros in a bus index. > > [quoted text clipped - 4 lines] > Best regards, > Spehro Pefhany Thanks for your reply. >> >OrCad doesn't tolerate leading zeros in a bus index. >> > [quoted text clipped - 6 lines] > >Thanks for your reply. You're very welcome. The issue is specifically covered both in the online help and in the User's Guide. There are other useful things there too, BTW. Best regards, Spehro Pefhany Signature"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com > >> >OrCad doesn't tolerate leading zeros in a bus index. > >> > [quoted text clipped - 10 lines] > online help and in the User's Guide. There are other useful things > there too, BTW. Thanks again. > OrCad doesn't tolerate leading zeros in a bus index. > > Make a quicky 2-sheet test; you'll see. Thanks, I just wanted to see if anyone knew for sure that Orcad did not allow this. I have not done schematics in a year or two and all the various tools seem to blend together after awhile. I expect I have used the leading zero naming convention in VHDL or possible Viewlogic which is the only other capture program I can recall working with. |
Reply to this Message |
 Sign In
 Join
 My Latest Posts My Monitored Threads My Blog My Photo Gallery My Profile My Homepage Start New Thread Enable EMail Alerts Rate this Thread
|
©2009 Advenet LLC Privacy Policy - Terms of Use
This website includes both content owned or controlled by Advenet as well as content owned or controlled by third parties.