 |
 | Home | Contact Us | FAQ | Search & Site Map | Link to Us |
 | Sign In | Join | Other 45 Sites in Network |
| HomeDiscussion GroupsElectronicsBasicsRepairDesignCADComponentsEquipmentElectrical Engineering ElectronicsKB.com Contact UsLink To UsSearch & Site Map |
Electronics Forum / CAD / December 2005electrical interface problem
Hi there, I'm currently working on a board design and I have to interface two VLSI chips to each other that don't have exactly compatible level characteristics. To be more precise I have a differential CML output of U(t) = 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V * rect(t) being 100 Ohm differentially terminated. I first thought about AC coupling but that only kills my DC part but doesn't come to solve the problem of incompatible swings. Maybe a resistor network would be the right choice but I am not so firm on that topic. Any help, suggestions and calculation examples would be appreciated. Many thanks in advance and best regards, Melanie > Hi there, > [quoted text clipped - 12 lines] > > Melanie You need about a 10dB pad. A suitable method, about 50 ohm in and out (view with fixed font) High drive output R1 Low drive input Out + --------- /\/\/\/\ --------- In+ / / R2 \ \ R3 / / Out - -------- /\/\/\/\ ------------- In- R4 Where R2 = R3 = 62 ohm R1 = R4 = 68 ohm Vin -> 0.4Vp-p, Vout -> .125Vp-p, Rin = 47.2 ohm, Rout = 47.2 ohm Cheers PeteS Hi PeteS, thanks for your reply. I don't think that would work because the CML output stage "must see" 50 ohm transmission lines and I guess it would not be allowed to terminate them with 62 ohm in the middle? Bye Mel >> Hi there, >> [quoted text clipped - 37 lines] > > PeteS >Hi PeteS, > [quoted text clipped - 3 lines] > >Bye Mel Is the signal at the end of these "transmission lines" your specified ±400mV? Source and end termination _would_ account for the factor of 1/2 that John Larkin and I have been fretting over. Does the far end have to terminate to Vref, or would 100 ohm differential suffice? ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. Hello Jim, thanks for your support so far. The source termination is both lines 50 Ohm to Vref (CML) but the end termination should be 100 Ohm differentially. Where does the factor of 1/2 accrue from? The far end must not terminate to Vref but has to be 100 Ohm differential. As transmitter I am using Xilinx' RocketIOs but their swing is higher than the maximum receiver swing (+/- 400mV instead of +/- 125mV) and the receiver is NOT supposed to exept some other common mode range than the 1.15 Volt (that's part of the specification: the goal is to achieve nearly exactly the U(t) given in my first mail). Many thanks in advance, Mel >>Hi PeteS, >> [quoted text clipped - 21 lines] > > I love to cook with wine. Sometimes I even put it in the food. >Hello Jim, > >thanks for your support so far. The source termination is both lines 50 Ohm >to Vref (CML) but the end termination should be 100 Ohm differentially. >Where does the factor of 1/2 accrue from? Your observed signal swing. When you "source terminate" and then terminate the far end of the line you lose 1/2 of the swing. >The far end must not terminate to >Vref but has to be 100 Ohm [quoted text clipped - 32 lines] >> >> I love to cook with wine. Sometimes I even put it in the food. ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >Hi there, > [quoted text clipped - 12 lines] > >Melanie May I presume that Vref is +2.2V and the CML is open-collector pulling current through the 50 ohm terminations to make the ±400mV signals? 8mA alternating from each collector? Can additional current be drawn from Vref? ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >>Hi there, >> [quoted text clipped - 20 lines] > > ...Jim Thompson I think CML is usually a unidirectional current sink, an open collector, pulling about 16 mA for the full-swing version, basicly an ECL sort of stage without the emitter follower. Some have an internal termination to Vcc, some don't. Somebody correct me if I'm wrong. Melanie may be able to do a direct connection, depending on the common-mode specs of the receiver. We need more detail. John >>>Hi there, >>> [quoted text clipped - 32 lines] > >John ±400mV differential would imply an 8mA current source, steered by a diff-pair. But sometimes people get balled up in confusion about differential peak and peak-to-peak. But 16mA _would_ give the conventional 800mV single-ended output. I don't know what is the real spec, since I'm always on-chip and run as little as 150mV P-P differential... gotta keep those swings down when you're doing 3GHz ;-) ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. Hi all, thanks for your fast reply. Vref is in fact +2.5V and I'm not sure whether CML is open-collector and how much current is alternating from each collector. Maybe a look at http://www.xilinx.com/bvdocs/userguides/ug024.pdf (page 103) will help but I am not so firm on those electrical specs. You would help me a lot by explaining that to me, though. :-) As transmitter I am using Xilinx' RocketIOs but their swing is higher than the maximum receiver swing (+/- 400mV instead of +/- 125mV) and the receiver is NOT supposed to exept some other common mode range than the 1.15 Volt (that's part of the specification: the goal is to achieve nearly exactly the U(t) given in my first mail). Many thanks in advance.... Regards, Mel >>>>Hi there, >>>> [quoted text clipped - 55 lines] > > I love to cook with wine. Sometimes I even put it in the food. >Hi all, > [quoted text clipped - 11 lines] > >Regards, Mel [snip] Well! That's certainly clear as mud ;-) Are the 50 ohm resistors on-chip or off-chip? ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >>>>Hi there, >>>> [quoted text clipped - 44 lines] > > ...Jim Thompson Well, you don't have long tranny lines and remote terminations on-chip! If you did, the chips would be toast. Some of the CML parts, like a few of the GigaLogic things, have an internal 50 ohms to Vcc, so that if you terminate again, externally, you get logic levels of Vcc and Vcc-0.4. I think "current mode logic" is a sometimes generic term, not precise like, say "TTL". (Just a little joke here.) A couple of the Giga parts have pure current sinks that are externally programmable, all the way down to zero if you cheat a little, very clean and linear, 40 ps edges. That can be real handy. John What 50 ohm resistors (on-chip or off-chip) are you referring to, Jim? The CML transmitters have an internal 50 ohms to Vcc. And a question to John: I didn't understand why I get logic levels of Vcc and Vcc-0.4 if I terminate again externally? Where does the 0.4V come from? Or is it my swing that Vcc is high and Vcc-0.4 is low voltage level? Thanks, Mel "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> schrieb im Newsbeitrag news:kf5ep1p3ir5euum0h02ogu4n7h8t72th42@4ax.com... >>>>>Hi there, >>>>> [quoted text clipped - 64 lines] > > John >What 50 ohm resistors (on-chip or off-chip) are you referring to, Jim? The >CML transmitters have an internal 50 ohms to Vcc. And a question to John: I [quoted text clipped - 3 lines] > >Thanks, Mel [snip] We think it's likely "standard" CML with a switched 16mA current sink, each 50 ohm would get pulled down 800mV. Add another 50 ohm in parallel ( the input impedance of the transmission line) and you get 400mV. ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. Okay then, all I got is a "standard CML driver" as described in http://www.xilinx.com/bvdocs/userguides/ug024.pdf and I want to interface to the receiver that is NOT supposed to exept some other common mode range than 1.15 Volt and voltage swing of +/- 125mV. How can this be achieved? I'm not a crack on this field so maybe you have to start be zero to explain to me. But first of all a quick solution would be better... ;-) Can or SHOULD I use a resistor network? Regards, Mel >>What 50 ohm resistors (on-chip or off-chip) are you referring to, Jim? >>The [quoted text clipped - 23 lines] > > I love to cook with wine. Sometimes I even put it in the food. Since this is a xilinx related issue you might try to post this question to comp.arch.fpga where the xilinx folks hang out. Others have run into this and generally are very happy to give answers. There are people from xilinx there as well to answer questions. > What 50 ohm resistors (on-chip or off-chip) are you referring to, Jim? The > CML transmitters have an internal 50 ohms to Vcc. And a question to John: I [quoted text clipped - 75 lines] >> >>John >Since this is a xilinx related issue you might try to post this >question to comp.arch.fpga where the xilinx folks hang out. >Others have run into this and generally are very happy to give >answers. There are people from xilinx there as well to answer >questions. [snip] Also make sure of the rigidity of the 1.15V receiver common-mode spec. This sounds like LVDS. This number is what the LVDS _transmitter_ puts out. Most of the _receivers_ (Fairchild, for instance, some parts of which I've designed) can tolerate almost rail-to-rail input common-mode. ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >I don't know what is the real spec, since I'm always on-chip and run >as little as 150mV P-P differential... gotta keep those swings down >when you're doing 3GHz ;-) --- So, no help offered, just more of your "Look at me, Ma" bullshit.  SignatureJohn Fields Professional Circuit Designer > >I don't know what is the real spec, since I'm always on-chip and run > >as little as 150mV P-P differential... gotta keep those swings down [quoted text clipped - 6 lines] > John Fields > Professional Circuit Designer What else do you expect out of him, John? he has to beat his chest at every chance to try to convince himself he's still worth something. Signature? Michael A. Terrell Central Florida >Hi there, > [quoted text clipped - 12 lines] > >Melanie See... Newsgroups: alt.binaries.schematics.electronic Subject: electrical interface problem - MelanieCML.pdf Message-ID: <6acep1d0gm5qbckb17t6506aof82lfbd60@4ax.com> for a possible solution. (If you can't access the binary group let me know and I will post to a URL.) This uses AC coupling. If you happen to have the luxury of being able to adjust the current source in the CML output, I think this can be done direct-coupled. ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >Hi there, > [quoted text clipped - 12 lines] > >Melanie See Message-ID: <0bjep1hbrm067tksqjgtoqanvme5c310tl@4ax.com> in alt.binaries.schematic.electronic, subject "electrical interface problem" for a PDF on this discussion. See if the schematic in abse is what you are thinking of. If so, then you might get by with an attenuator and a DC voltage divider. R4-R8 is the attenuator which provides 10.1 dB of attenuation. R7, R8, and R10 form the DC voltage divider. R9 is the terminator for your mystery device. You can see in the simulation that your input common mode level is 1.15V and the signal level to the input (v(inp,inn))is 0.125Vpp. The equivalent power supply voltage running your 50 Ohm source resistors, VTTX, is 2.14 VDC which meets the Xilinx VTTX minimum supply of 1.8V. Is this close to what you are thinking of? --- Mark Oh, thank you so much.... everything became quite clear as I had a look at your drawings. I'm not sure if AC coupling like proposed by Jim Thompson in MelanieCML.pdf is relly necessary. In my oppinion a "plain" resistor network will do the job, so no need for AC coupling, right? Regards, Mel >>Hi there, >> [quoted text clipped - 34 lines] > --- > Mark Could someone please do me a favor and post something for me at Newsgroups: alt.binaries.schematics.electronic. I think I found a solution myself but I am not sure whether it will work. I made a drawing and would like to discuss that but I'm not allowed to post at Newsgroups: alt.binaries.schematics.electronic. Thanks, Mel > Oh, thank you so much.... everything became quite clear as I had a look at > your drawings. I'm not sure if AC coupling like proposed by Jim Thompson [quoted text clipped - 42 lines] >> --- >> Mark I think I found a solution to the post "electrical interface problem" but I am not sure whether it will work. I made a drawing and would like to discuss that but I'm not allowed to post at Newsgroups: alt.binaries.schematics.electronic. Could someone help me, please? I'm sorry for bothering you with this question but I'm out of ideas... Best Regards, Melanie Nasic > Could someone please do me a favor and post something for me at Newsgroups: > alt.binaries.schematics.electronic. > > I think I found a solution myself but I am not sure whether it will work. I > made a drawing and would like to discuss that but I'm not allowed to post at > Newsgroups: alt.binaries.schematics.electronic. Email them to me, along with the thread title you want them labeled with. John, would you please be so kind to post my message with the binaries?! Thanks a lot. Mel >> Could someone please do me a favor and post something for me at >> Newsgroups: alt.binaries.schematics.electronic. [quoted text clipped - 4 lines] > > Email them to me, along with the thread title you want them labeled with. > John, would you please be so kind to post my message with the binaries?! > > Thanks a lot. Your message? Which one? And I haven't received the binary files from you, yet. Please email whatever binary files you wish to be posted, to me, along with whatever text you want included, and I will post the whole thing on A.B.S.E for you. > Mel > [quoted text clipped - 6 lines] >> >>Email them to me, along with the thread title you want them labeled with. Hi John, I've send them to you yesterday along with my email. I did it again for 3 minutes, could you please check? Maybe your mail program thought of me like spam?! ;-) Bye, Mel >> John, would you please be so kind to post my message with the binaries?! >> [quoted text clipped - 17 lines] >>> >>>Email them to me, along with the thread title you want them labeled with. > Hi John, > [quoted text clipped - 3 lines] > > Bye, Mel Yes, they were in the trash. One of my filters caught them. Sorry. Posted. Hi, I wonder what is the characteristic impedance of the circuit proposal CMLmystery.pdf? I think this is the easiest way to do it but I want to be sure that the CML transmitter still "sees" 50 Ohm line impedance. Any comments on that? Bye, Mel. >> Hi John, >> [quoted text clipped - 7 lines] > > Posted. >Hi, > [quoted text clipped - 4 lines] > >Bye, Mel. [snip] qrk/Mark implies that the transmitter can be operated with less output common mode (as I suspected), so just use my version without caps, use no divider to set output CM, just twiddle the pull-down R, as in Mark's version until you get the +1.15V at the receiver. (My values were line-match based.) ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. Hi Jim, don't the changes you suggest effect the line match (twiddling the pull-down Rs)? Nonetheless I would like to calculate the impedance of Mark's circuit. Any suggestions how I can find out about the impedance? Bye Mel >>Hi, >> [quoted text clipped - 22 lines] > > I love to cook with wine. Sometimes I even put it in the food. >Hi Jim, > [quoted text clipped - 3 lines] > >Bye Mel [snip] Oooops! In Mark's version they do affect impedance. Use a single midpoint pull-down... my divider without the upper resistor. Insert transmission line into your drawing, then you can visualize source and termination easier. ...Jim Thompson | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. >>>Hi, >>> [quoted text clipped - 22 lines] > >Bye Mel See posting in abse, "electrical interface problem - Melanie_attn.gif" I'm not quite sure of your electronics knowledge, so I'll show the steps to finding the equivalent input impedance of the network. This will work for both mine and Jim's circuits since they are essentially the same. Item 1, in Melanie_attn.gif, is the full network. R7 has no effect on the differential impedance. R7 is only to set the DC bias point for your receiver. In Jim's schematic (MelanieCML.pdf), the bias parts R8, R9, C3 have no effect on the differential impedance. Item 2 shows the network without R7 since the node R7,R4,R5 is at zero AC potential. Items 3, 4, and 5 show the step by step simplification of the network to get the equivalent input impedance of the network. The double bars (||) mean parallel, i.e. R1||Rb means R1 in parallel with Rb. Your Rocket IO wants to drive an impedance of 100 Ohms differential, not 50 Ohms. The difference between Jim Thompson's circuit and mine: Jim thinks you need to add termination resistor at the input to the receiver (the pair of 49.9 Ohm resistors). Jim's circuit gives 17.6 dB attenuation which might be too much. I think that the termination resistor is included on the receiver silicon die. That would be R6 in the schematic. My circuit gives 10.1 dB attenuation. I also use non-standard resistor values only because I'm too lazy to look up standard values. Boy, it's nice being unemployed and lazy! Before this discussion goes on, we really need to know what your receiver device is. John Larkin brings up some valid points about simplification of the interface which could null this discussion of level shifting and attenuator pads. --- Mark Hi Mark, thank you so much for your elaborations. Everything became pretty clear for me now. So I got approx 100 Ohm for the resistor network now. But as I want to transmit data in the Gigahertz range aren't I supposed to take a complex HF impedance value into account? Are there any further calculations I have to make to gain a conclusion whether this circuit will work for signals with data rates of 3 Gbps. Regards, Melanie >>>>Hi, >>>> [quoted text clipped - 67 lines] > --- > Mark >>>>>Hi, >>>>> [quoted text clipped - 75 lines] > >Regards, Melanie Yes, you need to consider complex impedances, or more likely how to minimize the reactive part. You don't say what sort of path your signal must travel between driver and receiver. If only a couple cm on the circuit board, this should be manageable with careful layout practices. If your signal goes through connectors, difficulties can arise. I suggest getting a copy of Howard Johnson's book, "High-Speed Digital Design: A Handbook of Black Magic" (ISBN: 0133957241). It has lots of practical information. Good WC reading. Your uni library may have a copy. Look for application notes on routing high-speed lines on printed circuit boards. You usually find these articles for 10 Gb/s I/O. If you have access to simulation tools like Mentor's HyperLynx I would suggest learning how to use these tools. You can simulate your signal path and see what sort of problems you may run into. Xilinx has Mentor binary models of the output structure and packaging. To model the differential impedance of the traces on your circuit board, you can use ATLC <http://atlc.sourceforge.net/>. It's a graphically instructive program, well worth looking at the results. Version 4.4.4 is compiled for Windows. It is a user unfriendly program, but free and multi-platform. There are other programs that calculate differential impedance like Polar's very expensive programs <http://www.polarinstruments.com/>. Many printed circuit board manufacturing houses use the Polar programs. You can call your PCB fabricator and ask them for the trace dimensions. Once you know your PCB stackup, you can talk to your PCB fabricator. This is normal communication between the designer and fabricator when dealing with high-speed signals. --- Mark --- Mark |
Reply to this Message |
 Sign In
 Join
 My Latest Posts My Monitored Threads My Blog My Photo Gallery My Profile My Homepage Start New Thread Enable EMail Alerts Rate this Thread
|
©2009 Advenet LLC Privacy Policy - Terms of Use
This website includes both content owned or controlled by Advenet as well as content owned or controlled by third parties.