speed of tran analysis in SPICE3
|
|
Thread rating:  |
vivian - 20 Sep 2005 19:48 GMT Hi,
SInce the stop time if my TRAN analysis is long, tens of micro seconds, it takes a long time. Any idea of decrease the time consuming on the simulation? No difference if a big time step is used.
Thank you.
Helmut Sennewald - 20 Sep 2005 20:11 GMT > Hi, > [quoted text clipped - 4 lines] > > Thank you. Hello Vivian,
maybe your PC is too slow.
A ".tran 100us" takes exactly 1.2345sec on my PC.
What exactly means SPICE3 in your case?
I recommend to try your circuit with some other SPICE-programs. My secret tip is 'ecipsTL'. Just read this '' backward.
Best regards, Helmut
Jim Thompson - 20 Sep 2005 22:19 GMT >> Hi, >> [quoted text clipped - 10 lines] > >A ".tran 100us" takes exactly 1.2345sec on my PC. Eh? How can that be? Simulation speed is circuit-content dependent.
>What exactly means SPICE3 in your case? > [quoted text clipped - 3 lines] >Best regards, >Helmut ...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
vivian - 21 Sep 2005 02:21 GMT Hello, Jim
Is there anything I can do to increase the speed? My circuit is a ring VCO.
Thank you.
Jim Thompson - 21 Sep 2005 02:59 GMT >Hello, Jim > >Is there anything I can do to increase the speed? >My circuit is a ring VCO. > >Thank you. Which flavor of Spice?
Oscillators always need a small max timestep
Use a .IC statement, or a starting current pulse
...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
vivian - 21 Sep 2005 14:29 GMT Hello Jim,
I am using Spice3 under unix. Actually, I have used .IC statement in my spice file. Does that help?
Jim Thompson - 21 Sep 2005 15:12 GMT >Hello Jim, > > I am using Spice3 under unix. Actually, I have used .IC statement in >my spice file. >Does that help? The .IC statement usually improves start-up time dramatically, but generally won't have any effect on the length of time the total simulation takes.
...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
vivian - 21 Sep 2005 17:07 GMT Thank you all for your kind help!
vivian
vivian - 21 Sep 2005 02:19 GMT Thank you for your reply.
SPICE3 is the spice program for unix. WHat does 'ecipsTL' mean?
Helmut Sennewald - 21 Sep 2005 06:20 GMT > Thank you for your reply. > > SPICE3 is the spice program for unix. > WHat does 'ecipsTL' mean? Hello Vivian,
This 'ecipsTL' is LTspice. It's written for WIN-98,ME,2K,XP. You can use it with WINE under Linux as well, but 99.99% of the users run LTspice under the native OS WIN-xx. Please use it with WIN-xx to avoid any unnecessary problems. It can be used with netlists or with schematics.
http://ltspice.linear.com/software/swcadiii.exe
Best regards, Helmut
Genome - 21 Sep 2005 12:50 GMT > > Thank you for your reply. > > [quoted text clipped - 13 lines] > Best regards, > Helmut You still get slapped wristies for......
<quote> A ".tran 100us" takes exactly 1.2345sec on my PC. </quote>
Fortunately your name sounds like you are German so, other than no sense of humour, we might assume you have a different one.
I think the origin of Germans having no sense of humour arises because the language is at least 84.607E3% longer than the rest of the stuff we grunt with and the audience goes to sleep long before the punchline.
OK..... I'm an a.shole.
DNA
Fred Bartoli - 21 Sep 2005 20:55 GMT > > > Thank you for your reply. > > > [quoted text clipped - 26 lines] > language is at least 84.607E3% longer than the rest of the stuff we grunt > with and the audience goes to sleep long before the punchline. How can you think that people insisting on saying 21 "one and twenty" lack sense of humor?
 Signature Thanks, Fred.
vivian - 21 Sep 2005 21:30 GMT Thank you for your kind help.
Brett - 25 Sep 2005 08:06 GMT Hmmm. Getting rid of any un-needed capacitances,or lowering their values may help. Also, look into a faster machine with more memory? Reading the replies from the (V-E-R-Y elite) S.E.C. social club probably won't help, because it seems they are mostly a bunch of self-absorbed a.sholes.
> Hi, > [quoted text clipped - 4 lines] > > Thank you. Helmut Sennewald - 25 Sep 2005 11:28 GMT Hello Brett,
The first message from Vivian contained no information about the simulated circuit. How could somebody give any useful advice except running it on the fastest PC?
After the second posting from Vivian we have got informed that it is a ring oscillator. I expect now that it's an odd number of inverters in a loop. There is still no detailed information about the circuit, e.g. the number of stages. It makes a big difference whether you use 3 or 31 inverters. In the ladder case the simulation time will be 10 times longer.
After the third message we know it's any SPICE-3 simulator under Unix. Something self compiled? Who can give any advice for an unknown program?
--- Hello Vivian,
I have tried now with an 11 stage ring oscillator which oscillates at about 1.8GHz. The extrapolated simulation speed on the fastest edge P4 or AMD64 would be about 20ns per second of simulation time with the high precision setting for the LTspice-simulator(default). This speed can be increased by factors(2 to 5) when the accuarcy requirement will be decreased. The important parameters in LTspice are reltol and trtol.
> > Since the stop time if my TRAN analysis is long, tens > > of micro seconds, ... It's still not specified how many micro seconds. Let's assume he wants 40us. This would require in my case 2000seconds when using the high precision simulator settings. The amount of data may be in the range of 20 millions data points per saved node voltage.
* Please remember that these are results for my circuit * which is most probably not the circuit from Vivian. * Maybe he has used less inverter stages which gives * a shorter simulation time.
Conclusion: Ring oscillators cause a lot of transitions where SPICE automatically has to decrease the timestep to get useful results. The number of circuit nodes also increases with more stages. Overall the simulation time has been roughly proportional to the number of inverter stages.
Best regards, Helmut
LTspice is an unlimited free SPICE program with GUI from Linear Technology. http://ltspice.linear.com/software/swcadiii.exe
There is an independent user group. http://groups.yahoo.com/group/LTspice/
Jim Thompson - 25 Sep 2005 18:48 GMT >Hello Brett, > [quoted text clipped - 53 lines] >There is an independent user group. >http://groups.yahoo.com/group/LTspice/ I just pulled out a 7-stage BIPOLAR ring oscillator from my files, simulated for a total of 1us with max timestep set to 1ps (*).
Simulation time 915 seconds, 1.09ns per second of simulation, oscillator frequency 2.7GHz.
(*) To get good resolution for the Spectral/Fourier that was also performed.
With no max timestep restriction, 101.86 seconds of simulation time, 9.82ns per second of simulation, but seriously degraded spectral view.
A CMOS circuit would likely run faster, since there are far fewer elements.
...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Jim Thompson - 25 Sep 2005 17:02 GMT >Hmmm. Getting rid of any un-needed capacitances,or lowering their values may >help. Also, look into a faster machine with more memory? Reading the replies >from the (V-E-R-Y elite) S.E.C. social club probably won't help, because it >seems they are mostly a bunch of self-absorbed a.sholes. [snip]
I may be "self-absorbed", but I'm not clueless, as you appear to be.
...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
JosephKK - 26 Oct 2005 04:35 GMT > Hmmm. Getting rid of any un-needed capacitances,or lowering their values > may help. Also, look into a faster machine with more memory? Reading the [quoted text clipped - 9 lines] >> >> Thank you. Brett, you just elected yourself to the a.shole status IMNSHO. Some of these people are very helpful SPICE experts. They can also get distracted talking to past and around each other and not answer OP. If you really want them to help, post your netlist or if it is large put it on a web page or some other publicly accessable place. And help you will normally get.
 Signature JosephKK
Jim Thompson - 26 Oct 2005 04:43 GMT >> Hmmm. Getting rid of any un-needed capacitances,or lowering their values >> may help. Also, look into a faster machine with more memory? Reading the [quoted text clipped - 15 lines] >want them to help, post your netlist or if it is large put it on a web page >or some other publicly accessable place. And help you will normally get. And recommending getting RID of capacitance ranks Brett as the most clueless one of the year... SHEEEESH ;-)
...Jim Thompson
| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Evgenii Rudnyi - 25 Sep 2005 17:44 GMT > SInce the stop time if my TRAN analysis is long, tens of micro > seconds, it takes > a long time. Any idea of decrease the time consuming on the simulation? > No difference if a big time step is used. In principle, there is a technique "model reduction" that allows us to reduce the dimension of the original circuit. You can have a look at
R. W. Freund, Reduced-Order Modeling Techniques Based on Krylov Subspaces and Their Use in Circuit Simulation http://cm.bell-labs.com/cm/cs/doc/98/3-02.ps.gz
Unfortunately, in order to use this you need to have special software.
Best wishes,
Evgenii Rudnyi -- http://www.imtek.uni-freiburg.de/simulation/mor4ansys/ http://Evgenii.Rudnyi.Ru/
|
|
|