HI, everyone. Can someone advise me (and the group) if there is a way to
avoid mistakes in schematic, which may appear if you write wrong off page
connector name or hierarchical pin/ports name? It is possible to create text
netlist, and ...comparing all the nets and schematic it is possible to find
mistakes, but it may take too much time. It is possible to create off page
connectors report and discover similar names in it. But may be there are
some additional features to do the same? So, what is the best way checking
up a schematic? Any hints?
>HI, everyone. Can someone advise me (and the group) if there is a way to
>avoid mistakes in schematic, which may appear if you write wrong off page
[quoted text clipped - 4 lines]
>some additional features to do the same? So, what is the best way checking
>up a schematic? Any hints?
The netlister has Wirelist output option. It is a human readable text file.
Some comprehension may be necessary ;)
Regards,
Boris Mohar
Got Knock? - see:
Viatrack Printed Circuit Designs (among other things) http://www.viatrack.ca
Slav Mit. - 23 Jun 2005 09:46 GMT
> The netlister has Wirelist output option. It is a human readable text file.
> Some comprehension may be necessary ;)
[quoted text clipped - 5 lines]
> Got Knock? - see:
> Viatrack Printed Circuit Designs (among other things) http://www.viatrack.ca
I see, thanks. (Using: create netlist> others>pcadnlt.dll) But the question
is, how to use the information more properly? Use my finger to folow all
traces on the PCB, or something? That is not High Technology, is it? :)
How it can help if I type one wrong letter in a name of an off page
connector? I see, my questions might look stupid, but my desire is to avoid
rather expensive mistakes, so .. sorry.
Good luck and thanks again.
Slav.