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Electronics Forum / Electronics / August 2008Ultra-LD 200W Power Amp Mk2 SC Aug 2008
I've been trying to understand the theory behind the design of the Ultra-LD 200W Power Amp Mk2 in the Aug 2008 issue of Silicon Chip. The amp uses On Semiconductor's NJL3281D/NJL1302D ThermalTrak power transistors. These have integral diodes. This is the full circuit: http://us1.webpublications.com.au/static/images/articles/i1107/110797_10mg.jpg Photo of amp module: http://us1.webpublications.com.au/static/images/articles/i1107/110797_12mg.jpg Bias circuit: http://us1.webpublications.com.au/static/images/articles/i1107/110797_9mg.jpg The article: http://www.siliconchip.com.au/cms/A_110797/article.html Transistor datasheet: http://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF In the absence of an adjustment, how can you guarantee that the quiescent current settles at a level that is optimum for crossover distortion and power dissipation purposes? Wouldn't the actual bias current be highly dependent on the characteristics of Q10 and Q11? Would a standard Vbe multiplier arrangement where DQ12/DQ13 and DQ14/DQ15 were wired in parallel (with series resistors ?), and Q10/Q11 were at ambient temperature, be a better way to do this? Wouldn't that guarantee optimal thermal tracking, and wouldn't that allow the amp to be optimally biased? BTW, the article states that the quiescent voltage across the 0.1 ohm emitter resistors is 70-100mV. I believe this should be 7-10mV. - Franc Zabkar  SignaturePlease remove one 'i' from my address when replying by email. "Franc Zabkar" > I've been trying to understand the theory behind the design of the > Ultra-LD 200W Power Amp Mk2 in the Aug 2008 issue of Silicon Chip. The [quoted text clipped - 3 lines] > This is the full circuit: > http://us1.webpublications.com.au/static/images/articles/i1107/110797_10mg.jpg (snip) > In the absence of an adjustment, how can you guarantee that the > quiescent current settles at a level that is optimum for crossover > distortion and power dissipation purposes? Wouldn't the actual bias > current be highly dependent on the characteristics of Q10 and Q11? ** The Vbe of Q10 and Q11 ( at 8mA and 55V ) IS critical to the actual output device bias current in that circuit. The SC boys likely tried a few MJE15030/1 devices, all from the same batch and came to the nonsense conclusion Motorola ( or ON Semi) made them all identical and would do so into the indefinite future. The circuit needs a bias trim pot somewhere to allow for production variations in the MJEs. > Would a standard Vbe multiplier arrangement where DQ12/DQ13 and > DQ14/DQ15 were wired in parallel (with series resistors ?), and > Q10/Q11 were at ambient temperature, be a better way to do this? ** That is gobbledegook. Vbe multipliers use transistors, not diodes. > Wouldn't that guarantee optimal thermal tracking, and wouldn't that > allow the amp to be optimally biased? ** The whole idea of having integral bias diodes inside the output devices is so the bias voltage compensation will track the ACTUAL chip temperature and so the bias current stays as close as possible to constant. Thing is, the chip temp of an audio output transistor in a class B amplifier varies suddenly and over a wide range - ie in a couple of seconds it may go from 25C to 150C. A Vbe multiplier circuit can only track the temp of the ambient air OR the heatsink used by the output devices - which will not vary anywhere near as quickly OR over such a wide range as the output device chips. Means bias voltage compensation is slow arriving and always less than needed to maintain the same bias current. This in turn means that after a sudden increase in output power, the output devices are over-biased and remain that way until well after the output power level drops back to a low level again. In the new SC circuit, there are four Vbe voltages to compensate - the two MJEs and two of the NJLs (cos output devices in parallel behave as one). However, the MJEs pass only 1% of the current the NJLs do (since Hfe =100) and so dissipate only 1% of their power as well. Means the chip temp of the MJEs is controlled more by the output device heatsink temp than their own puny dissipation. As stated previously, the heatsink temp is nothing like the output device chip temp so the SC bias circuit is wrong - it over-compensates. Bias current in the output devices will fall significantly during a burst of power - but the previously set level will return very quickly, a few seconds after drive is stopped, when all the chips acquire the same temp as the heatsink. This gives a false illusion of good bias stability. > BTW, the article states that the quiescent voltage across the 0.1 ohm > emitter resistors is 70-100mV. I believe this should be 7-10mV. ** Another SC typo ...... ..... Phil > "Franc Zabkar" > [quoted text clipped - 74 lines] > > ..... Phil has anyone done an amp yet using, say, an MSP430 running a thermal model based on sampled output power to control the bias setpoint? it would be really easy to do, and the thermal model itself is almost trivial. there are lots of ways to get the slow thermal information, including generating the actual voltage reference using a controlled Vbe multiplier sitting on the heatsink..... an MSP430 is cheap, fast, and doesnt draw much current. 100ks/s wouldnt be hard to achieve, and is almost fast enough to fully protect the junction. If its a decent amp, use a decent processor (spend $10) and get 1Ms/s or so. but I do like the idea of a tiny DSP sitting on the output, directly measuring each transistors current and Vce. Cheers Terry "Terry Given" > has anyone done an amp yet using, say, an MSP430 running a thermal model > based on sampled output power to control the bias setpoint? it would be > really easy to do, and the thermal model itself is almost trivial. ** There are two, long proven ways of solving the problem of class B bias setting. 1. Use the output BJTs in common emitter mode - ie with the load connected to the collectors. 2. Use no bias at all in the output devices. Solution #1 removes the output transistor B-E junction temp from the equation and the heatsink temp as well, long as the drivers have their own heatsink. Solution #2 is achieved by using drive transistors to cover the first 25mW or so of output power, then the output devices act purely as current boosters after that. This is the preferred way if multiple parallel devices are used. Then, there is the Quad "Current Dumping " method, still covered by patent AFAIK - a neat variation on solution #2 that is just soooooo elegant. Digital solutions have neither need nor appeal. ..... Phil > "Terry Given" > [quoted text clipped - 18 lines] > boosters after that. This is the preferred way if multiple parallel devices > are used. That is the way I like to do it. QSC designs use both methods albeit with a common heatsink. However this leads to a very non-linear transfer characteristic at low levels, which a Singapore distributor brought to my attention once. > Then, there is the Quad "Current Dumping " method, still covered by patent > AFAIK - a neat variation on solution #2 that is just soooooo elegant. Yet I've never heard one I liked the sound of. > Digital solutions have neither need nor appeal. For SOA monitoring ? Overkill really. Just use enough output devices and design sensibly. Seems to work. I've spent ages thinking through suitable alternative protection schemes but if you do (as you do) need to drive a highly reactive load (which it may be at certain frequencies only) it isn't simple. Not by a long way. Graham "Eyesore" Phil Allison > "Terry Given" >> [quoted text clipped - 25 lines] > > QSC designs use both methods albeit with a common heatsink. ** All the QSC amps I ever saw had forward biased output transistors and puny driver transistors. Which one uses zero bias ????? > However this leads > to a very non-linear transfer characteristic at low levels, which a > Singapore > distributor brought to my attention once. ** As usual - no details provided. Just more bollocks. >> Then, there is the Quad "Current Dumping " method, still covered by >> patent >> AFAIK - a neat variation on solution #2 that is just soooooo elegant. > > Yet I've never heard one I liked the sound of. ** More bollocks.............................. >> Digital solutions have neither need nor appeal. > > For SOA monitoring ? ** Not what the context here is - pal. The Stevenson troll simply choses NOT to read what people actually post. Cos it gets in the way of his insatiable, psychotic urge to bullshit wildly. ..... Phil > "Eyesore" > Phil Allison [quoted text clipped - 20 lines] > ** All the QSC amps I ever saw had forward biased output transistors and > puny driver transistors. MJE15032/33s are PUNY ? > Which one uses zero bias ????? All the RMXs for sure. The main output device bias is set just below turn-on, typically around 500mV. Fairly certain the MXs too. > > However this leads to a very non-linear transfer characteristic at low > levels, which a > > Singapore distributor brought to my attention once. > > ** As usual - no details provided. It was YEARS ago man FFS. I'm just sharing info. Graham "Eyesore" > Phil Allison > >> [quoted text clipped - 24 lines] > > MJE15032/33s are PUNY ? ** Not used in any of the USA or MX series. And the drivers do not drive current into the load in any case. So you are TOTALLY WRONG as bloody usual. >> Which one uses zero bias ????? > > All the RMXs for sure. ** Completely FALSE. All output BJTs are biased on. >> > However this leads to a very non-linear transfer characteristic at low >> levels, which a [quoted text clipped - 3 lines] > > It was YEARS ago man FFS. I'm just sharing info. ** All you are doing is posing UTTER BULLSHIT. ...... Phil > If its a decent amp, use a decent processor (spend $10) and get 1Ms/s or > so. but I do like the idea of a tiny DSP sitting on the output, directly > measuring each transistors current and Vce. I've thought of that using analog circuitry and a multiplier chip. The thing is though, you CAN exceed the DC safe area quite happily by LOADS for short periods. That makes it difficult to calculate. Graham >>If its a decent amp, use a decent processor (spend $10) and get 1Ms/s or >>so. but I do like the idea of a tiny DSP sitting on the output, directly [quoted text clipped - 6 lines] > > Graham I guess that depends on your definition of difficult, but its the *entire* point of using a DSP. A second order thermal model is easy, and should give quite good results. However its not really much more complex to have a higher order thermal model - think chain matrices, for example, or cascaded second-order sections Cheers Terry >I've been trying to understand the theory behind the design of the >Ultra-LD 200W Power Amp Mk2 in the Aug 2008 issue of Silicon Chip. The [quoted text clipped - 7 lines] >quiescent current settles at a level that is optimum for crossover >distortion and power dissipation purposes? Leo Simpson has told me that the amp design was based closely on this On Semi application note: http://www.onsemi.com/pub/Collateral/AND8196-D.PDF He also says that the September issue will explain how to adjust the bias to account for variation in the diodes (not Q10/Q11). No trimpot is used. - Franc Zabkar SignaturePlease remove one 'i' from my address when replying by email. "Franc Zabkar" > Leo Simpson has told me that the amp design was based closely on this > On Semi application note: > > http://www.onsemi.com/pub/Collateral/AND8196-D.PDF ** ROTFLMAO !! That fraudulent document was debunked by me on AAPLS back in February of 2005 - when Arny Krueger raised it. For one thing, the MPSA06 and MPSA56 transistors (Q7 & Q8 ) have to cop nearly double their rated maximum Vce - so the amp will immediately blow up !! For another, the text indicates that the bias current in the second version is HUGE - around 1 amp per device !! (The bias voltage between the bases of Q7 and Q8 was raised by 200mV - meaning the idle drop across each 0.1 ohm ballast resistor is raised by around 100mV too ) So the second version is operating in damn near full class A. BTW: The multi-colour THD curves are HILARIOUS !! 4 out of 6 are done with NO LOAD on the amplifier !!!!! How informative !!!!!!!!!!!!!!!!! Mark Busier sounds like a fake name - and his article is fake too. > He also says that the September issue will explain how to adjust the > bias to account for variation in the diodes (not Q10/Q11). No trimpot > is used. ** I can hardly wait ...... .... Phil >>I've been trying to understand the theory behind the design of the >>Ultra-LD 200W Power Amp Mk2 in the Aug 2008 issue of Silicon Chip. The [quoted text clipped - 12 lines] > >http://www.onsemi.com/pub/Collateral/AND8196-D.PDF Something doesn't seem quite right about the bias circuit in Fig 1. The text states that the "small signal transistor (TO-92) [is] mounted on the heat sink between the (TO-220) power output drivers". Since the MJL3281A and MJL1302A devices come in a TO-264 package, I suspect this is a typo. In any case I don't think it makes sense to place Q5 (MPSA06) near Q9 and Q10 (MJE15032/MJE15033) which are the only TO-220 devices. As for the biasing circuit, it seems to me that the Vbe multiplier consisting of Q5 is set for 6 diode drops. Therefore I would think that for proper thermal tracking, the 6 "diodes" in the multiplier would need to be matched by 6 PN junctions on the heatsink. AFAICT we only have 4, namely Q9 and Q14/15/16 and Q10 and Q11/12/13, unless Q7 (MPSA06) and Q8 (MPSA56) are also mounted on the same heatsink. However, the article is unclear as to the location of the latter. In fact it is not even clear as to the location of Q9 and Q10. To cloud matters further, the introduction to the article states that "one of the major design concerns in the output section of a typical class AB audio amplifier is output bias and stability over the operating temperature range. In the past, this was typically accomplished through the use of a single bias transistor mounted on the amplifiers heatsink in close proximity to the output devices." - Franc Zabkar SignaturePlease remove one 'i' from my address when replying by email. |
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